Min-net winner-take-all CMOS implementation |
| |
Authors: | He Y. Sanchez-Sinencio E. |
| |
Affiliation: | Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA; |
| |
Abstract: | A charge-based winner-take-all (WTA) circuit is proposed. This WTA circuit is a min-net capable of selecting the minimum value among its input nodes and gives only one low voltage for the corresponding output node. The charge-based circuit uses a power supply of 3 V, with low power dissipation due to the lack of static DC current involved. The WTA circuit is used in associative neural networks.<> |
| |
Keywords: | |
|
|