Design implementation of ATM switch with input priority anddistributed output buffers |
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| Authors: | Mukerjee M.R. Borhanuddin Mohd Ali Sreedharan B. |
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| Affiliation: | Dept. of Electron. & Comput. Eng., Univ. of Pertanian Malaysia, Serdang; |
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| Abstract: | A switch architecture for ATM is described which uses a simple priority module to resolve input contention and a distributed design to permit transfer of input cells to the first free output buffer. The switch has been synthesised using VHDL software and a target generic library and can operate at speeds >400 Mbit/s |
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