Design and fabrication of a planar patch-clamp substrate using a silicon-on-insulator wafer |
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| Zhang Zhenlong, Liu Xiangyang, Mao Yanli. Design and fabrication of a planar patch-clamp substrate using a silicon-on-insulator wafer[J]. Journal of Semiconductors, 2009, 30(9): 096001. doi: 10.1088/1674-4926/30/9/096001 Zhang Z L, Liu X Y, Mao Y L. Design and fabrication of a planar patch-clamp substrate using a silicon-on-insulator wafer[J]. J. Semicond., 2009, 30(9): 096001. doi: 10.1088/1674-4926/30/9/096001.Export: BibTex EndNote |
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| Authors: | Zhang Zhenlong Liu Xiangyang Mao Yanli |
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| Affiliation: | Institute of Optics and Photoelectronic Technology, School of Physics and Electronics, Henan University, Kaifeng 475004, China;Institute of Optics and Photoelectronic Technology, School of Physics and Electronics, Henan University, Kaifeng 475004, China;Institute of Optics and Photoelectronic Technology, School of Physics and Electronics, Henan University, Kaifeng 475004, China |
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| Abstract: | noise. |
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| Keywords: | planar patch-clamp substrate silicon-on-insulator access resistance capacitance |
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