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The role of buffer layer in strontium bismuth tantalate based ferroelectric gate mos structures for non-volatile non destructive read out memory applications
Authors:Myoungho Lim  T. S. Kalkur
Affiliation:Microelectronics Research Laboratories, Department of Electrical and Computer Engineering , University of Colorado at Colorado Springs, Colorado Springs, CO 80933, USA
Abstract:Abstract

Metal Ferroelectric Insulator Semiconductor (MFIS) structure has been fabricated with strontium bismuth tantalate (SBT) as the ferroelectric thin film and zirconium oxide (ZrO2) as the insulating buffer layer. SBT film was deposited by spin-on metal organic deposition (MOD) technique. ZrO2 film was deposited by electron beam evaporation. The capacitance versus voltage characteristics(C-V) of the MFIS structure shows hysteresis and the direction of hysteresis corresponds to ferroelectric polarization. The C-V characteristics of MFIS structure shows memory window of 1.8 volts for a write/erase voltage of 9V at a sweep rate of 1 sec/1.8V. In order to understand the role of coercive voltage on the memory window in MFIS structures, C-V characteristics metal-ferroelectric-metal (MFM) structures with various SBT film thickness’ were also studied.
Keywords:MFIS structure  NDRO memory  memory window
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