基于链接器的RISC-V字加载指令优化

RISC-V作为精简指令集的代表,也会反映一些精简指令集的弊端,程序体积偏大就是其中之一.在精简指令集(RISC)中,实现一些复杂操作所需要的指令条数普遍会多于复杂指令集(CISC),进而导致最后生成的二进制程序体积相较CISC程序更大.并且嵌入式设备的RAM和ROM普遍较小,因此在嵌入式场景中,程序的体积变得尤为重要.为了在现有压缩指令集的基础上尽可能的优化RISC-V程序代码体积, RISC-V指令集子扩展Zce制定了一系列指令.其中以LWGP为代表的一系列指令被用来减少加载/存储字节数据时的指令条数.本文分析了以LWGP为代表的指令对于代码体积的优化原理并且将之实现在LLD链接器上,通过分析使用LWGP等指令前后程序体积的变化评估对于二进制程序体积优化的效率并且提出后续改进建议.

RISC-V Load Instruction Optimization Based on LLD

As a typical example of reduced instruction sets, RISC-V can also reflect some disadvantages of the reduced instruction set computer (RISC), and large program size is one of the problems. Compared with the complex instruction set computer (CISC), RISC generally requires more instructions to implement complex operations and results in a large binary size of the program. Meanwhile, RAM and ROM in embedded devices are generally small. Therefore, it means that the binary size of the program is significant for embedded scenarios. In view of this, the Zce sub-extension of RISC-V has developed a series of instructions to reduce the program size as much as possible. Specifically, the instructions represented by the LWGP are used to reduce the number of instructions when loading/storing bytes. This study analyzes the principle of the LWGP instructions in reducing the code size and implements it on the LLD linker. It also evaluates the efficiency of LWGP in reducing the binary size of the program by analyzing the change in program size before and after using LWGP instructions and puts forward recommendations for improvement.