| 一种高速低功耗LVDS发射器设计 |
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| 引用本文： | 谢凤英,孙金中. 一种高速低功耗LVDS发射器设计[J]. 中国集成电路, 2014, 0(3): 32-35 |
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| 作者姓名： | 谢凤英 孙金中 |
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| 作者单位： | 中国电子科技集团公司第38研究所,安徽合肥230031 |
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| 摘 要： | 依据标准IEEE Std.1596.3-1996,提出了一种高速低电压差分信号(LVDS)发射器电路,给出电路结构、仿真数据及版图。电路采用65 nm 1P9M CMOS Logic工艺设计实现。用Spectre仿真器对发送器进行模拟仿真,仿真结果表明该发射器电路在电源电压为2.5 V的工作条件下,数据传输速率可以达到2 Gbps,平均功耗为9mW。
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| 关 键 词： | 低压差分信号(LVDS) 发射器 低功耗 高速 |
A Design of Low power High Speed LVDS Transmitter |
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| XIE Feng-ying,SUN Jin-zhong. A Design of Low power High Speed LVDS Transmitter[J]. China Integrated Circuit, 2014, 0(3): 32-35 |
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| Authors: | XIE Feng-ying SUN Jin-zhong |
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| Affiliation: | , (China Electronic Technology Group Co. No.38 Research Institute, Hefei 230031, China) |
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| Abstract: | This paper presents an implementation of high speed and low power LVDS transmitter based on 6 process according to IEEE Sial 1596.3-1996, which includ schematic structure, simulation data and lay Spectre simulator is used to run the simulation and the results show that the transmitter can achieve transml up to 2 Gbps with an average power consumption of 9 mW. |
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| Keywords: | Low-voltage differential signaling （ LVDS ） Transmitter Low power High speed 5nm logic out. The ssion rate |
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