Self-aligned GaAs p-channel enhancement mode MOS heterostructurefield-effect transistor |
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| Authors: | Passlack M. Abrokwah J.K. Droopad R. Zhiyi Yu Overgaard C. Sang In Yi Hale M. Sexton J. Kummel A.C. |
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| Affiliation: | Motorola Inc., Tempe, AZ; |
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| Abstract: | Self-aligned GaAs enhancement mode MOS heterostructure field-effect transistors (MOS-HFET) have been successfully fabricated for the first time. The MOS devices employ a Ga2O3 gate oxide, an undoped Al0.75Ga0.25As spacer layer, and undoped In0.2Ga0.8As as channel layer. The p-channel devices with a gate length of 0.6 μm exhibit a maximum DC transconductance gm of 51 mS/mm which is an improvement of more than two orders of magnitude over previously reported results. With the demonstration of a complete process flow and 66% of theoretical performance, GaAs MOS technology has moved into the realm of reality |
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