| Low K芯片引线键合工艺计算机仿真与参数优化 |
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| 引用本文： | 黄卫东. Low K芯片引线键合工艺计算机仿真与参数优化[J]. 电子与封装, 2008, 8(2): 1-5 |
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| 作者姓名： | 黄卫东 |
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| 作者单位： | 飞思卡尔半导体中国有限公司,天津,300385 |
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| 摘 要： | Low K材料具有较高的脆性，在芯片封装测试过程中容易被损坏，因而Cu／low—K的结构的引入对芯片的封装工艺提出了很大的挑战。文章中提出引线键合工艺中冲击阶段的近似数学模型，由计算机仿真结果证实该理论模型的合理性。通过对计算机仿真结果的分析得到优化的LowK芯片引线键合工艺参数设置范围，实验设计的优化结果表明本研究提出的计算机仿真优化方法是有效的。
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| 关 键 词： | Low K 引线键合 有限元分析 优化 |
| 文章编号： | 1681-1070（2008）02-0001-05 |
| 收稿时间： | 2008-01-02 |
| 修稿时间： | 2008-01-02 |
Computational Modeling and Process Parameter Optimization for Wire Bonding Technology on Low-K Wafers |
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| HUANG Wei-dong. Computational Modeling and Process Parameter Optimization for Wire Bonding Technology on Low-K Wafers[J]. Electronics & Packaging, 2008, 8(2): 1-5 |
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| Authors: | HUANG Wei-dong |
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| Affiliation: | HUANG Wei-dong ( Freescale Semiconductor China Ltd., Tianjin 300385, China ) |
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| Abstract: | An approximate mathematical model is proposed to characterize the impact stage of wire bonding. The computer simulation results prove the model's rationality in the current low K wire bonding application. The optimal process setting ranges for the current case are deduced by analyzing the simulated responses of bond ball shape. The optimized results from DOE( design of experiment) confirm the effectiveness of the optimization methodology presented in this study. |
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| Keywords: | low K wire bonding finite element analysis optimization |
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