1T1R结构RRAM的故障可测性设计

阻变随机存储器(RRAM)中存在的故障严重影响产品的可靠性和良率.采用精确高效的测试方法能有效缩短工艺优化周期,降低测试成本.基于SMIC 28 nm工艺平台,完成了1T1R结构的1 Mbit RRAM模块的流片.详细分析了测试中的故障响应情况,并定义了一种故障识别表达式.在March算法的基础上,提出针对RRAM故障的有效测试算法,同时设计了可以定位故障的内建自测试(BIST)电路.仿真结果表明,该测试方案具有占用引脚较少、测试周期较短、故障定位准确、故障覆盖率高的优势.

Fault Measurability Design of the RRAM Based on 1T1R Structure

The malfunctions existing in the resistive random access memory (RRAM) seriously affect the reliability and yield of the storage production. By utilizing the precise and efficient testing method, the process optimization cycle can be greatly shortened, and the product cost can be reduced. The 1 Mbit RRAM memory module with the structure of one transistor one resistance (1T1R) was fabricated based on the SMIC 28 nm process platform. The fault response was analyzed in detail, and an expression of the fault identification was defined. An effective test algorithm for the fault of the RRAM was proposed based on the March algorithm. Meanwhile, a built-in-self-test (BIST) circuit to locate the fault in the array was accurately designed. The simulation results show that the proposed test scheme has the advantages of fewer footprints,shorter test cycle,higher fault location precision and higher fault coverage.