首页 | 本学科首页   官方微博 | 高级检索  
     


Characterization of chip scale packaging materials
Authors:Masazumi Amagai
Affiliation:New Package Development (NPD) Department, Texas Instruments Japan, 4260 Aza Takao, Oaza Kawasaki, Hiji-machi, Hayami-gun, Oita 879-15, Japan
Abstract:The mechanical stability of Chip Scale Packages (CSP) used in surface mount technology is of primary concern. The dominant issues are package warpage and solder fatigue in solder joints under cyclic loads. To address these issues, molding compound and die attach film were characterized with finite element method which employed a viscoelastic and viscoplastic constitutive model. The model was verified with experiments on package warpage, PCB warpage and solder joint reliability. After the correlation was observed, the effect of molding compound and die attach film on package warpage and solder joint reliability was investigated. It was found that package warpage tremendously affected solder joint reliability. Furthermore, a die attach film was developed based on results of the modeling. CSP with the developed die attach film are robust and capable of withstanding the thermal stresses, humidity and high temperatures encountered in typical package assembly and die attach processes. Also, a lead free solder is discussed based on the results of creep testing. This paper presents the viscoelastic and viscoplastic constitutive model and its verification, the optimum material properties, the experimental and simulated reliability and performance results of the u*BGA packages, and the lead free solder creep.
Keywords:
本文献已被 ScienceDirect 等数据库收录!
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号