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Charge trapping in MOS systems
Authors:DJ BreedRP Kramer
Affiliation:Philips Research Laboratories, Eindhoven The Netherlands
Abstract:Measurements on MOS capacitors and MOS transistors at room temperature and 77 K lead to the conclusion that large slow-trapping effects can occur at the Si-SiO2 interface at room temperature. These “slow state” effects differ substantially from the “slow state” effects usually observed in the Si-SiO2 system.
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