| 基于FPGA的FIR数字滤波器的设计与实现 |
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| 引用本文： | 蒋小燕,孙晓薇,胡恒阳,钱显毅. 基于FPGA的FIR数字滤波器的设计与实现[J]. 常州工学院学报, 2011, 24(2): 13-15,45 |
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| 作者姓名： | 蒋小燕 孙晓薇 胡恒阳 钱显毅 |
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| 作者单位： | 常州工学院电子信息与电气工程学院,江苏常州,213002 |
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| 摘 要： | 文章介绍了有限脉冲响应（FIR）数字滤波器的结构特点和基本原理，提出了一种基于FPGA的高效实现方案。该方案用Matlab工具确定滤波器的系数，然后用VHDL语言实现了16阶常系数FIR滤波器，并用MAX＋plusII软件对滤波器进行了逻辑仿真，结果满足滤波器性能指标设计要求。
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| 关 键 词： | FIR滤波器 FPGA VHDL MAX+plus II |
Design and Implementation of FIR Filter Based on FPGA |
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| JIANG Xiao-yan SUN Xiao-wei HU Heng-yang Qian Xian-yi. Design and Implementation of FIR Filter Based on FPGA[J]. Journal of Changzhou Institute of Technology, 2011, 24(2): 13-15,45 |
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| Authors: | JIANG Xiao-yan SUN Xiao-wei HU Heng-yang Qian Xian-yi |
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| Affiliation: | JIANG Xiao-yan SUN Xiao-wei HU Heng-yang Qian Xian-yi(School of Electronic Information & Electric Engineering,Changzhou Institute of Technology,Changzhou 213002) |
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| Abstract: | Based on the introduction of the structural characteristics and the basic principles of finite im- pulse response （FIR） digital filter, this paper gives an efficient proposal of implementation of FPGA-based case. Such a proposal uses MATLAB tools in the case to determine filter coefficients, and VHDL language to get a 16-order constant coefficient FIR filters. And then it takes use of MAX ＋ plus II to simulate filters, whose results meet the performance design requirements. |
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| Keywords: | FIR filter FPGA VHDL MAX ＋ plus II |
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