| 基于流水线加法器的数字相关器设计 |
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| 引用本文： | 雷青锋,郏文海. 基于流水线加法器的数字相关器设计[J]. 现代电子技术, 2010, 33(16): 151-153 |
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| 作者姓名： | 雷青锋 郏文海 |
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| 作者单位： | 中国电子科技集团公司第二十研究所,陕西,西安,710068 |
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| 摘 要： | 数字相关器在数字扩频通信系统中应用广泛,受数字信号处理器件速度限制,无法应用于高速宽带通信系统,在此提出了一种基于流水线加法器的数字相关处理算法。该算法最大限度地减少了加法器进位操作,解决了基于全加器型数字相关器存在的进位延迟过大的问题,实现了时分多址体制下的同步段数字相关,提高了同步段相关的可靠性。
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| 关 键 词： | 扩频通信 数字相关 FPGA 流水线加法器 相关器 |
Design of Digital Correlator Based on Pipeline Adder |
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| LEI Qing-feng,JIA Wen-hai. Design of Digital Correlator Based on Pipeline Adder[J]. Modern Electronic Technique, 2010, 33(16): 151-153 |
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| Authors: | LEI Qing-feng JIA Wen-hai |
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| Affiliation: | (No.20th Institute,CETC,Xi＇an 710068,China) |
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| Abstract: | Digital correlator is widely applied in digital spread-spectrum communication system,but it cannot be used in high speed wide-band communication system due to the limitation of low-speed DSP device.In this paper,a full-adder based digital correlation processing algorithm is proposed,which largely decreased the carry operation in the full-adder,solved the problem of carry time-delay existing in the full-adder based digital correlator,achieved the synchronization processing in time-division-multiple-access based system and improved the reliability of the synchronization correlation. |
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| Keywords: | FPGA |
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