一种高性能的嵌入式微处理器:银河TS-1

银河TS-1嵌入式微处理器是国防科学技术大学计算机学院设计的32位嵌入式微处理器,完全正向设计,具有自主版权.在体系结构上采用RISC内核,六级流水线,具有独立的数据Cache和指令Cache.特别的,TS-1具有两个取指部件的动态指令调度机制,拥有面向嵌入式应用的向量处理机制,采用基于内容复制/交换的寄存器窗口技术的中断处理机制,支持WISHBONE IP核互连接口规范,具有良好的扩展性.本文主要介绍TS-1的RISC核心设计思想和关键实现技术,最后给出性能评测结果.TS-1设计已经在Altera的FPGA EP20K400EBC上面得到了验证,主频可以达到36.7MHz.

A High Performance Embedded Microprocessor:YH TS-1

YH TS 1 is a 32 bit embedded microprocessor designed by School of Computer in National University of Defense Technology.It is a top down design and has fully intellectual property.YH TS 1 has a RISC core,six stage pipeline,separated data Cache and Instruction Cache.Specially,YH TS 1 has dynamic instruction schedule with two instruction fetch units,vector processing mechanism towards embedded application,content copy/switch based register window interrupt processing mechanism,and support of the open WISHBONE IP interface specification.This paper will mainly describe the YH TS 1 RISC core design methodology and its critical implementation technologies.The experimental results will also be given at the end of the paper.TS 1 has been implemented and verified in Altera's FPGA EP20K400EBC,and the clock frequency can be 36.7MHz.