| 基于FPGA的流水线CORDIC算法的DDFS设计 |
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| 引用本文： | 王佳琪,熊先越. 基于FPGA的流水线CORDIC算法的DDFS设计[J]. 光通信技术, 2012, 36(4): 61-62 |
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| 作者姓名： | 王佳琪 熊先越 |
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| 作者单位： | 1. 浙江大学信息与电子工程学系,杭州,310027
2. 中国电子科技集团公司第三十四研究所,广西桂林 |
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| 摘 要： | 在射频系统后端信号处理调制解调系统中,直接数字频率合成器(DDFS)起着非常重要的作用。介绍了CORDIC算法的基本原理,提出了一种利用流水线结构生成高频率分辨率、高动态范围正弦波的方法,并给出了利用FPGA实现该流水线结构CORDIC算法的过程。
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| 关 键 词： | 射频 CORDIC算法 流水线 直接数字频率合成器 |
DDFS design based on FPGA pipelined CORDIC algorithm |
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| WANG Jia-qi , XIONG Xian-yue. DDFS design based on FPGA pipelined CORDIC algorithm[J]. Optical Communication Technology, 2012, 36(4): 61-62 |
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| Authors: | WANG Jia-qi XIONG Xian-yue |
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| Affiliation: | 1.Dept.of Information Science and Electronic Engineering,Zhejiang University,Hangzhou 310027,China;2.The 34th Research Institute of CETC,Guilin Guangxi 541004,China) |
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| Abstract: | In the radar back-end signal processing modulation and demodulation system,Direct Digital Frequency Synthesizer(DDFS) is very important.Introducing the basic principles of the CORDIC algorithm.A pipeline architecture was proposed to generate a sin wave of high frequency and high dynamic range.Furthermore,the FPGA implementation of the pipeline architecture of the CORDIC algorithm was given. |
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| Keywords: | radar CORDIC algorithm pipeline DDFS |
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