| 高速ADC电路性能评估系统 |
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| 引用本文： | 钱宏文,朱燕君,徐韬. 高速ADC电路性能评估系统[J]. 电子与封装, 2008, 8(9): 39-42 |
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| 作者姓名： | 钱宏文 朱燕君 徐韬 |
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| 作者单位： | 中国电子科技集团公司第五十八研究所,江苏,无锡,214035 |
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| 摘 要： | 文章简要地介绍了高速ADC电路性能评估系统的整体设计方案、系统的硬件设计以及PC应用软件的设计方法。评估系统硬件包括ADC电路评估板、数据采集子板、PCI-E采集卡三块子板,并分别阐述了各子板的功能框图、结构组成和设计要点。系统应用软件采用图形化显示界面,经实际使用表明,该高速ADC电路评估系统结构灵活、性能稳定可靠,方便更换不同的ADC评估板来测试不同的ADC电路,既可用于分辨率为8-16bit、采样频率500MHz以内的高速ADC电路性能评估,也可以用于多达64通道、125M的高速数据采集。
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| 关 键 词： | ADC FPGA PCI-E总线 |
High Speed ADC Circuit Performance Evaluation System |
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| QIAN Hong-wen,ZHU Yan-jun,XU Tao. High Speed ADC Circuit Performance Evaluation System[J]. Electronics & Packaging, 2008, 8(9): 39-42 |
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| Authors: | QIAN Hong-wen ZHU Yan-jun XU Tao |
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| Affiliation: | (China Electronics Technology Group Corporation No. 58 Research Institute, Wuxi 214035, China) |
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| Abstract: | This paper describes the entire scheme, hardware design and PC application software design of high speed ADC circuit performance evaluation system. It includes ADC circuit evaluating board, ADC data capture board and PCI-E data acquisition card. Function block, structure and design points of each board is introduced individually. The application software uses graphic display interface. The practice result shows that the evaluation system is stable and reliable, and is convenient for different ADC circuits testing with different ADC evaluating boards. It can be used to evaluate the performance of high speed ADC circuit with 8-16bit resolution and sampling frequency less than 500MHz, and also can be used to high speed data acquisition up to 64 channels and 125M frequency. |
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| Keywords: | ADC FPGA |
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