| 基于VHDL的386EX ISA总线实现方法 |
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| 引用本文： | 徐中,浮吉彦,杨秋弟,吴晓华,黄重威. 基于VHDL的386EX ISA总线实现方法[J]. 计算机工程, 2002, 28(11): 221-223 |
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| 作者姓名： | 徐中 浮吉彦 杨秋弟 吴晓华 黄重威 |
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| 作者单位： | 1. 华东计算技术研究所,上海,200233
2. 第二炮兵第二研究所,北京,100085 |
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| 摘 要： | 讨论了386EXISA总线的硬件实现，提出了按模块化的设计方法建立硬件模型，并根据标准ISA总线的要求建立基于HDL的元件库，元件库具有灵活性好，扩展性强的特点，设计者可根据需要任意修改库单元，灵活的接口功能使用户可方便地将各模块加入到设计中。
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| 关 键 词： | VHDL 386EXISA总线 内部总线 外部总线 计算机 |
| 文章编号： | 1000-3428(2002)11-0221-03 |
| 修稿时间： | 2002-03-12 |
The Realization Way of 386EX ISA Bus Based on VHDL |
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| XU Zhong,FU Jiyan,YANG Qiudi,WU Xiaohua,HUANG Chongwei. The Realization Way of 386EX ISA Bus Based on VHDL[J]. Computer Engineering, 2002, 28(11): 221-223 |
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| Authors: | XU Zhong FU Jiyan YANG Qiudi WU Xiaohua HUANG Chongwei |
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| Affiliation: | XU Zhong1,FU Jiyan2,YANG Qiudi1,WU Xiaohua1,HUANG Chongwei1 |
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| Abstract: | This article discusses the hardware realization of the 386EX ISA bus, puts forward the thought of building hardware model according to the design way of modularization, and builds the part library of VHDL language according to the ISA bus standard. This part library is apt to use and extend , so the designers can modify the parts easily to meet their requirements. The user can add the model to their designs because of the flexible interface function. |
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| Keywords: | EX VHDL ISA Time sequence Bus |
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