| C波段频率合成器的设计 |
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| 引用本文： | 郭奇.C波段频率合成器的设计[J].通信对抗,2007(2):62-64. |
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| 作者姓名： | 郭奇 |
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| 作者单位： | 中国电子科技集团公司第三十六研究所 浙江嘉兴314033 |
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| 摘 要： | 在分析常规数字锁相环路基础上,利用数字锁相混频环电路实现了C波段快速低相噪宽带频率合成器的设计,并进行了理论分析。给出的研制模块的指标测试结果,验证了理论分析的正确性。
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| 关 键 词： | 锁相环 混频环 相位噪声 C波段 |
| 收稿时间： | 2007-01-16 |
| 修稿时间： | 2007-01-16 |
Frequency Synthesizer Design for C-Band |
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| GUO Qi.Frequency Synthesizer Design for C-Band[J].Communication Countermeasures,2007(2):62-64. |
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| Authors: | GUO Qi |
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| Affiliation: | No.36 Research Institute of CETC, Jiaxing, Zhejiang 314033,China |
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| Abstract: | Based on the analysis of conventional digital phase-locked loop,this paper completes a design of C-band wideband frequency synthesizer with fast low phase noise by using digital phase-locked mixing loop circuit and progresses correspond theoretical analysis.With consideration of test results of the prototype technical data,the correctness of the theoretical analysis is verified. |
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| Keywords: | Phase Locked Loop(PLL) mixing PLL phase noise C-band |
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