| 基于FPGA的智能断路器分合速度测试系统 |
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| 引用本文： | 冉文,全力,张铭,郭慧浩.基于FPGA的智能断路器分合速度测试系统[J].低压电器,2008(11). |
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| 作者姓名： | 冉文 全力 张铭 郭慧浩 |
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| 作者单位： | 1. 江苏大学,电气信息工程学院,江苏,镇江,212013
2. 武汉高压研究所,湖北,武汉,430074 |
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| 摘 要： | 建立了一个断路器分合速度测试系统并对其进行了分析.该系统使用了一片可编程逻辑门阵列芯片及一个加速度传感器模块,配合相应的外围电路对断路器分合速度进行测试,是一个断路器测试片上系统解决方案.
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| 关 键 词： | 断路器 现场可编程逻辑门阵列 速度测试 |
An Intelligent Measurement System of Switch Speed for Circuit Breakers Based on FPGA |
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| RAN Wen,QUAN Li,ZHANG Ming,GUO Huihao.An Intelligent Measurement System of Switch Speed for Circuit Breakers Based on FPGA[J].Low Voltage Apparatus,2008(11). |
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| Authors: | RAN Wen QUAN Li ZHANG Ming GUO Huihao |
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| Abstract: | A measurement system of switch speed for circuit breakers based on FPGA was designed and analyzed.This system consists of a FPGA chip, acceleration sensor module and a simple external circuit.It was a System-onChip solution used in measurement of speed characteristics for a power circuit breakers. |
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| Keywords: | circuit breakers filed programmable gate array(FPGA) speed measurement |
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