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某型计算输出机试验台的设计
引用本文:李健健. 某型计算输出机试验台的设计[J]. 山西电子技术, 2009, 0(5): 30-31,80
作者姓名:李健健
作者单位:国营七八五厂第一研究所,山西太原030024
摘    要:以计算机的ISA总线为基础,对它的外围电路进行研究;以静态存储器作为共享存储介质,接口电路的设计包括各控制接口设计,标志逻辑电路设计以及可编程定时计数器的设计,该装置能对输出机进行各项检查。运行试验表明,该系统性能稳定,结构简单,调试方便,可作为对计算机ISA总线进一步研发的配套设备。

关 键 词:ISA总线  静态存储器  可编程定时计数器

Design of Test-bed for a Certain Type of Calculation Output Machine
Li Jian-jian. Design of Test-bed for a Certain Type of Calculation Output Machine[J]. Shanxi Electronic Technology, 2009, 0(5): 30-31,80
Authors:Li Jian-jian
Affiliation:Li Jian-jian (State-owned 785 Plant, Taiyuan Shanxi 030024, China)
Abstract:Based on the ISA bus of computer, the article studies its peripheral circuits; and takes SRAM as the shared storage medium, the design of interface circuit including control interface design, logo logic design, and programmable timing counter design are made. This device can check the output of the machine. It is demonstrated by running test that this system is characterized by stable performance, simple structure and convenient setting, so it can be used as auxiliary equipment on the ISA itself.
Keywords:ISA bus  SRAM  programmable timer counter
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