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NAND Flash 图像记录系统底层写入控制技术
引用本文:徐永刚,任国强,吴钦章,孙健. NAND Flash 图像记录系统底层写入控制技术[J]. 光电工程, 2012, 39(9): 138-144
作者姓名:徐永刚  任国强  吴钦章  孙健
作者单位:1. 中国科学院光电技术研究所,成都 610209
2. 中国科学院研究生院,北京 100049
基金项目:大科学工程国家遥感综合平台
摘    要:为提高图像记录系统中 NAND flash 阵列的存储带宽,分别研究和实现了 NAND flash 的片内交叉写入、片内并行写入和片内交叉并行写入控制技术,在此基础上提出了片内交叉写入和片外2级流水线结合的写入方法,该方法利用两组 NAND flash 片内交叉写入的命令地址和数据加载时间来填补烧写时间.最后用硬件方式在 FPGA中分别实现了上述各种写入控制方式的控制器.实验结果表明:本文实现的片内并行写入和片内交叉并行写入是普通写入方式速度的1.48903倍和3.27706倍,而本文提出的写入控制方法的写入速度是普通写入方式的3.96038倍,高于片外4级流水线的性能情况下,将 FPGA 管脚资源占用节省20%,有效降低了成本和记录系统实现难度.

关 键 词:交叉写入  流水线  NAND flash控制器  FPGA
收稿时间:2012-05-30

Write Control Technology of NAND Flash Image Recording System
XU Yong-gang,REN Guo-qiang,WU Qin-zhang,SUN Jian. Write Control Technology of NAND Flash Image Recording System[J]. Opto-Electronic Engineering, 2012, 39(9): 138-144
Authors:XU Yong-gang  REN Guo-qiang  WU Qin-zhang  SUN Jian
Affiliation:1,2 (1.Institute of Optics and Electronics,Chinese Academy of Sciences,Chengdu 610209,China;2.Graduate University of Chinese Academy of Science,Beijing 100049,China)
Abstract:To enhance the write bandwidth of NAND flash image recording system, the NAND flash on-chip write technologies of interleave, interleave two plane and two plane are researched and implemented respectively. Then, a new method based on NAND flash on-chip interleave write and off-chip 2 level pipelining is proposed, which utilizes the interleave load time of two NAND flash groups to fill the programming time. Finally, the controller with each write mode is realized in FPGA in the way of hardware. The experimental results show that on-chip two plane write speed and on-chip interleave two plane write speed are 1.489 03 times and 3.277 06 times of ordinary write speed respectively. However, the write speed of method proposed by this paper is 3.960 38 times of ordinary write speed, slightly higher than the 3.958 81 times of traditional off-chip 4 level pipelining. Moreover, proposed method can save 20% FPGA pin resources, and lower the cost and recording system realizing difficulty.
Keywords:interleave write  pipelining  NAND flash controller  FPGA
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