| 亚微米集成电路的ESD保护设计 |
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| 引用本文： | 袁博鲁,万天才.亚微米集成电路的ESD保护设计[J].微电子学,2012,42(2):206-209. |
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| 作者姓名： | 袁博鲁 万天才 |
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| 作者单位： | 重庆西南集成电路设计公司,重庆,400060 |
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| 摘 要： | 介绍了一种带ESD瞬态检测的VDD-VSS之间的电压箝位结构,归纳了在设计全芯片ESD保护结构时需要注意的关键点；提出了一种亚微米集成电路全芯片ESD保护的设计方案,从实例中验证了亚微米集成电路的全芯片ESD保护设计.
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| 关 键 词： | 亚微米集成电路 ESD保护 电压箝位 |
Design of ESD Protection for Submicron Integrated Circuits |
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| YUAN Bolu
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WAN Tiancai.Design of ESD Protection for Submicron Integrated Circuits[J].Microelectronics,2012,42(2):206-209. |
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| Authors: | YUAN Bolu WAN Tiancai |
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| Affiliation: | (Southwest Integrated Circuit Design Corp.,Chongqing 400060,P.R.China) |
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| Abstract: | A VDD-VSS voltage clamping structure with transient ESD detection was presented.Key points for designing all-chip ESD protection structure were summarized.A scheme to design an all-chip ESD protection circuit for submicron IC’s was proposed.An example was given to validate the design. |
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| Keywords: | Submicron IC ESD protection Voltage clamping |
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