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VDMOS的UIS能力与制造工艺流程的关系
引用本文:马万里,赵文魁. VDMOS的UIS能力与制造工艺流程的关系[J]. 微电子学, 2012, 42(2): 285-288
作者姓名:马万里  赵文魁
作者单位:深圳方正微电子,广东 深圳,518116
摘    要:介绍了几种不同工艺流程:利用光刻胶做掩蔽的P+掩模注入工艺,利用ILD做掩蔽的接触孔P+注入工艺,利用LTO形成的Spacer做屏蔽的平面氧化层P+工艺。分析了这几种工艺流程与UIS能力的关系。由于受光刻工艺影响存在差异,这三种做法最后形成的Deep body区域的横向尺寸差异很大,导致了其UIS能力差异也很大。最后,通过仿真,验证了平面氧化层P+工艺确实具有最强的UIS能力,与理论分析完全一致。

关 键 词:垂直双扩散晶体管  非箝位感性开关  单脉冲雪崩击穿能量

Dependency of UIS Capability for VDMOS on Manufacturing Process
MA Wanli , ZHAO Wenkui. Dependency of UIS Capability for VDMOS on Manufacturing Process[J]. Microelectronics, 2012, 42(2): 285-288
Authors:MA Wanli    ZHAO Wenkui
Affiliation:(Founder Microelectronics International Co.,Ltd.,Shenzhen,Guangdong 518116,P.R.China)
Abstract:For different manufacturing processes,the device construct and UIS capability were also different.Dependency of UIS capability for VDMOS on three manufacturing processes: P+ mask implantation with photo-resist as shield,contact P+ implantation with ILD as shield and planar oxide P+ implantation with LTO as shield,was investigated.The deep body region formed by the three processes had quite different lateral dimensions,which led to remarkable difference in UIS capability.Simulation results showed that planar oxide P+ implantation process had the most excellent UIS capability,which was in good agreement with theoretical analysis.
Keywords:VDMOS  UIS  EAS
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