Two-dimensional analysis of a test structure for lifetime profilemeasurements

A new electrical measurement technique has been proposed that allows one to obtain the “local” lifetime value in Si layers, by superposing ac measurements on a dc bias in a three-terminal test structure, and hence to extract a lifetime “profile” along the depth of the layer by varying the voltage bias. In this paper two-dimensional effects that could arise due to the lateral current flow in the test structure are studied, and are related to the modifications of the lifetime profile extracted. Both a simplified analysis and 2-D simulations of the test structure behavior allow one to explain the 2-D effects responsible for deviation of the lifetime profile from the correct one as dependent on the geometry of the test structure. Moreover design rules are given for the test structure, that keep the error in the profile extracted within safe limits