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基于神经网络的集成电路生产过程建模与优化
引用本文:王向东, 陈咏梅, 王守觉, 石林初. 基于神经网络的集成电路生产过程建模与优化. 自动化学报, 2001, 27(3): 289-295.
作者姓名:王向东  陈咏梅  王守觉  石林初
作者单位:1.中国科学院半导体研究所,北京;;;2.华晶电子集团公司双极设计所,无锡
摘    要:以提高半导体生产线的成品率为目标,利用神经网络对半导体芯片生产过程进行了建模和优化.首先使用神经网络方法建立模型,确定生产线上工艺参数和成品率之间的映射关系,构造多维映射函数曲面;随后对多维映射函数曲面进行搜索,搜索成品率最高的最优点,据此确定工艺参数的规范值;最后,根据优化后的工艺参数规范进行实际生产.采用这种优化建议,半导体生产线的平均成品率由51.7%提高到了57.5%.

关 键 词:神经网络   芯片制造   工序能力指数   提高成品率
收稿时间:1999-02-03
修稿时间:1999-02-03

Neural Network-Based Optimization of Vlsi Wafer Fabrication
WANG Xiang-Dong, CHEN Yong-Mei, WANG Shou-Jue, SHI Lin-Chu. Neural Network-Based Optimization of Vlsi Wafer Fabrication. ACTA AUTOMATICA SINICA, 2001, 27(3): 289-295.
Authors:WANG Xiang-Dong  CHEN YONG-MEI  WANG Shou-jue  SHI Lin-Chu
Affiliation:1. Institute of Semiconductors,Chinese Academy of Sciences,Beijing;Huajing Electronics Group Corporation,Wuxi
Abstract:In this paper, we present a neural based manufacturing process control system to improve the lot yield of wafer fab. The process is as follows: 1. A model based on feedforward neural networks is proposed to simulate the wafer manufacturing process. Learning from the historical technological records with a special dynamic learning method, the neural based model can approximate the function relationship between the technological parameters and the wafer yield precisely. 2. We also use a gradient descent method to search a set of optimal technological parameters that lead to the maximum yield by simulation. 3. We optimize the specifications of the wafer fab according to the optimal parameters. The wafer yield increases by 11 2% after the optimized specifications are applied to the wafer fabrication assembly.
Keywords:Neural networks   wafer fabrication   process capability index   yield enhancement.
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