基于合并单元装置的高精度时间同步技术方案

智能变电站的发展对合并单元的时间同步性能提出了更高的要求,研究如何实现高精度的对时和守时功能是智能变电站发展的现实需要。文中从授时源误差、晶振特性、守时算法、逻辑处理等主要因素出发,针对合并单元装置的对时及守时技术需求,探讨了高精度时间同步的设计与实现方法。在此基础上,提出一种具有工程意义的合并单元时间同步技术的实现方案。该方案以现场可编程门阵列(FPGA)为控制核心,在FPGA内部使用不同功能模块实现各个环节的逻辑设计,并通过CPU与FPGA的相互配合实现精确的时间同步及良好的守时性能。合并单元时间同步性的试验结果及其在智能变电站的实际应用表明,该技术满足了智能变电站内合并单元装置时间同步功能的要求。

A Highly Accurate Time Synchronization Technology Scheme Based on Merging Unit

The development of smart substation has led to higher requirements made on the time synchronization for the merging unit. A study on how to realize highly accurate time synchronization and time keeping function is a practical need for the smart substation development. Taking into account such chief factors as the timing source error, crystal oscillator characteristics, time keeping algorithm, and logic processing, this paper discusses the design and realization methods of highly accurate time synchronization in the merging unit based on the corresponding technical demand. Then an implementation scheme of time synchronization technology in merging unit for the smart substation is proposed. By using the field programmable gate array (FPGA) as the core component, the logic design of various technical links is realized by different modules in FPGA, and accurate time synchronization and good time keeping performance is achieved by the coordination between CPU and FPGA. Experimental results on time synchronization performance and application in smart substation of merging unit indicate that this technique completely meets the requirements of the merging unit device for the time synchronization function in the smart substation.