一种FPGA低功耗工作的实现方法

FPGA(Field-Programmable Gate Array)即现场可编程门阵列,作为专用集成电路(ASIC)领域中的一种半定制电路,具有成本低、可在线编程等优势,其并行运算的特点适用于大规模信号处理和数据计算等场合.随着近年来FPGA内部逻辑单元数量的提高以及片上系统的出现,应用范围更加广泛,功耗也相应增加.本文提出了一种FPGA低功耗工作的实现方法,利用外部CPU管理FPGA的电源电路,在FPGA程序挂起时降低动态功耗,特别是对需要电池的便携设备电池供电产品,可有效延长工作时间.

Low-power implementation of Field-Programmable Gate Array

FPGA, Field-Programmable Gate Array, is a semi custom circuit in the field of Application Specific Integrated Circuit(ASIC). It has the advantages such as low cost, online programming and so on, and the characteristics of its parallel execution is suitable for the large-scale signal processing and data calculation.With the increase of the number of logic units in FPGA and the emergence of the system on chip(SOC), the range of application is more extensive, and the power consumption is also increased correspondingly.This paper presents a method of FPGA implementation of low power consumption, with c using the external CPU. The dynamic power consumption can be reduced when the FPGA hangs up, and the working hours can be extended especially for battery powered portable devices.