A 0.8-V 4.9-mW 1.2-GHz CMOS Fractional-N Frequency Synthesizer for UHF RFID Readers

A fully integrated CMOS frequency synthesizer for UHF RFID reader is implemented in a 0.18-$mu$m CMOS technology. Due to the large self-interference and the backscatter scheme of the passive tags, reader synthesizer's phase noise requirement is stringent to minimize the sensitivity degradation of the reader RX. The modified transformer feedback voltage-controlled oscillator (VCO) exhibits enhanced tank impedance and even harmonic noise filtering to achieve low phase noise. A third-order 2-bit single-loop $Sigma Delta$ modulator is optimized for the proposed synthesizer in terms of phase noise and power. The synthesizer provides a frequency resolution of 25-kHz with a tuning range from 1.03 GHz to 1.4 GHz . Phase noise of ${-}$70 dBc/Hz inband, ${-}$104 dBc/Hz at 200-kHz offset and ${-}$ 121 dBc/Hz at 1-MHz offset with a reference spur of ${-}$84 dBc are measured at a center frequency of 1.17 GHz and a loop bandwidth of 35 kHz. Power dissipation is 4.92 mW from a 0.8 V supply.