分簇结构超长指令字DSP编译器的设计与实现

超长指令字（VLIW）是高端DSP普遍采用的体系结构。VLIW DSP在硬件上没有调度和冲突判决的机制，其性能的发挥完全依靠编译嚣的优化效果．基于可重定向编译基础设施IMPACT，为分簇VLIW DSP YHFT—D4设计与实现了优化编译器．其中着重讨论了可重定向信息的定义、代码注释、SIMD指令的支持、分簇寄存器分配以度指令级并行开发和资源冲突解决等内容．实验结果表明该编译器可以达到较好的优化效果．

Design and Implementation of Clustered VLIW DSP Compiler

Very Long Instruction Word (VLIW) architecture has been adopted by most high performance DSPs. There are no hardware to schedule instructions or to detect conflictions in VLIW DSPs, so the performance of VLIW DSP is dependent on compiler optimization. Based on retargetable compiler infrastructure IMPACT, An optimized compiler has been design and implement for clustered VLIW DSP YHFT-D4.Definition of retargetable information, code annotation, SIMD instructions supporting, clustered register allocation, instruction-level-parallel (ILP) exploring and resource confliction solving are emphatically discussed. Experiments show that the compiler is very effective in optimization.