The effects of electrical stress and temperature on the propertiesof polycrystalline silicon thin-film transistors fabricated by metalinduced lateral crystallization |
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Authors: | Tae-Kyung Kim Gi-Bum Kim Byung-Il Lee Seung-Ki Joo |
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Affiliation: | Sch. of Mater. Sci. & Eng., Seoul Nat. Univ. ; |
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Abstract: | An asymmetric Ni-offset method was proposed to improve the electrical properties of poly-Si thin-film transistors (TFTs) fabricated by metal-induced lateral crystallization (MILC). The MILC/MILC boundary, which was inevitably located within the channel when formed by symmetric Ni-offset, could be successfully extracted from channel region by new asymmetric Ni-offset method. Therefore, thus fabricated TFTs showed lower leakage current and better thermal stability than symmetric Ni-offset TFTs. In addition, the effects of electrical stress and temperature on the electrical properties of symmetric/asymmetric Ni-offset TFTs were investigated |
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