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High performance motion detection: some trends toward new embedded architectures for vision systems |
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| Authors: | Lionel Lacassagne Antoine Manzanera Julien Denoulet Alain Mérigot | ||
| Affiliation: | (1) Institut d’Electronique Fondamentale (IEF/AXIS), Université Paris Sud, Orsay, France;(2) Laboratoire d’Electronique et d’Informatique, Ecole Nationale Supérieure de Techniques avancées (ENSTA), Paris, France;(3) Laboratoire des Instruments et Systèmes d’Ile de France (LISIF/SYEL), Université Pierre et Marie Curie, Paris, France | ||
| Abstract: | The goal of this article is to compare some optimised implementations on current high performance platforms in order to highlight architectural trends in the field of embedded architectures and to get an estimation of what should be the components of a next generation vision system. We present some implementations of robust motion detection algorithms on three architectures: a general purpose RISC processor—the PowerPC G4—a parallel artificial retina dedicated to low level image processing—Pvlsar34—and the Associative Mesh, a specialized architecture based on associative net. To handle the different aspects and constraints of embedded systems, execution time and power consumption of these architectures are compared.
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| Keywords: | Embedded system Vision-SoC RISC SIMD SWAR Parallel architecture Programmable artificial retina Associative nets model Vision Image processing Motion detection High performance computing | ||
| 本文献已被 SpringerLink 等数据库收录！ | |||
