一种在高速I/O接口嵌入边界扫描电路的方法

描述了一种对原电路具有最低影响的，将边界扫描单元嵌入到高速I／O接口电路的方法。在该方法中，我们对传输端利用1149．1标准。将边界扫描驱动寄存器插入到低速并行端口。而在接受端则利用IEEE 1149．6标准将边界扫描接收寄存器插人到高速串行端口。在并行端插人边界扫描驱动单元可以减少数据传输的延迟时间,降低对原电路正常工作的影响。在接受串行端插入扫描接收单元可以对交流耦合高速I／O口进行有效的测试。最后通过芯片测试举例证实了使用该方法确实能够对高速I／O口进行工艺缺陷的测试。同时又不影响原电路的正常工作。

Methord of Integrating Boundary Scan into Multi-GHz I/O Circuit

A minimally invasive solution for adding boundary scan to high-speed I/O circuits is described. The insertion of boundary scan registers on the transmit side is done in the lower-speed parallel domain , while the boundary scan registers on the receive side is done using the techniques described in IEEE Std 1149.6 in the high-speed serial domain. The results from actual silicon testing are presented that demonstrate negligible impact on functional performance.