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基于FPGA的TD-LTE PUSCH信道处理设计
引用本文:张松轶.基于FPGA的TD-LTE PUSCH信道处理设计[J].无线电通信技术,2019(3):291-294.
作者姓名:张松轶
作者单位:1.河北远东通信系统工程有限公司
基金项目:国家重点研发计划(2017YFC0821903)
摘    要:作为LTE物理层最为重要的信道之一,上行共享信道PUSCH涉及到多个复杂信号处理过程。针对PUSCH信道的处理实现,介绍了PUSCH信道承载的3种主要信息:上行业务数据、上行控制信息和参考信号;设计了PUSCH信道对承载信息的处理流程,描述了各处理模块的功能及设计实现方案;搭建了测试环境,对上行信道进行测试并分析结果,证明了系统实现的合理性及有效性。

关 键 词:TD-LTE  PUSCH  DSP  FPGA

Design on FPGA-based TD-LTE PUSCH Channel Processing
ZHANG Songyi.Design on FPGA-based TD-LTE PUSCH Channel Processing[J].Radio Communications Technology,2019(3):291-294.
Authors:ZHANG Songyi
Affiliation:(Hebei Far-east Communication System Engineering Co.,Ltd.,Shijiazhuang 050200,China)
Abstract:As one of the most important channels in the LTE physical layer,the shared uplink channel PUSCH involves many complex signal processing courses.Aiming at the implementation of PUSCH processing,three types of main information carried by the PUSCH channel are introduced,including uplink traffic data,uplink control information and reference signal,the processing flow of information carried by PUSCH channel is designed,and the functions of different processing modules as well as the implementation scheme of the design are described.At the meanwhile,the test environment is established,the uplink channel tests are carried out,and the test results are analyzed.The analysis results prove the rationality and effectiveness of the system implementation.
Keywords:TD-LTE  PUSCH  DSP  FPGA
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