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电子互感器合并单元硬件构架研究与设计
引用本文:丁莉芬,赵明辉,闫方义,鲁凤娟. 电子互感器合并单元硬件构架研究与设计[J]. 郑州轻工业学院学报(自然科学版), 2011, 0(5)
作者姓名:丁莉芬  赵明辉  闫方义  鲁凤娟
作者单位:郑州轻工业学院电气信息工程学院;
基金项目:河南省科技计划项目(112300410144); 郑州轻工业学院校基金项目(2009XJJ006)
摘    要:在比较IEC60044—7/8标准和IEC61850—9—1标准中合并单元的基础上,基于IEC61850—9—1标准,利用DSP&FPGA构建了合并单元的硬件整体构架,硬件设计采用类似保护装置的分插件的设计思想.该方案保证了传输数据的准确性和实时性.

关 键 词:电子互感器  合并单元  分插件  

Research and hardware structure design on electronic transformer merging unit
DING Li-fen,ZHAO Ming-hui,YAN Fang-yi,LU Feng-juan. Research and hardware structure design on electronic transformer merging unit[J]. Journal of Zhengzhou Institute of Light Industry(Natural Science), 2011, 0(5)
Authors:DING Li-fen  ZHAO Ming-hui  YAN Fang-yi  LU Feng-juan
Affiliation:DING Li-fen,ZHAO Ming-hui,YAN Fang-yi,LU Feng-juan(College of Electr.and Infor.Eng.,Zhengzhou Univ.of Light Ind.,Zhengzhou 450002,China)
Abstract:On the basis of the comparison of the MU of difference of IEC60044-7/8 and IEC61850-9-1,the main modules and hardware scheme about MU based on DSP&FPGA is constructed according to IEC 61850-9-1.The hardware scheme adopts the design idea of partial plugin.It ensures that the data transmission is real-time and accurate.
Keywords:electronic transformer  MU  partial plugin  
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