| 基于IP核的PCI Express接口 |
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| 引用本文： | 徐天,何道君,徐金甫.基于IP核的PCI Express接口[J].计算机工程,2009,35(24):239-241. |
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| 作者姓名： | 徐天 何道君 徐金甫 |
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| 作者单位： | 1. 解放军信息工程大学电子技术学院,郑州,450004
2. 北方信息技术研究所,北京,100072 |
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| 摘 要： | 提出一种基于IP核的PCI Express接口设计方案,采用分层的体系结构,具有高性能、高可靠性、软件兼容等特点。在Xilinx公司的xc5vlx30t FPGA器件中,运用PCI Express硬核端点模块,设计并实现了PCI Express总线接口,同时在接口内部设计了DMA控制器。仿真实验结果表明,该接口能够有效提高总线的数据传输速率,充分发挥总线的性能。
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| 关 键 词： | PCI Express总线 现场可编程门阵列 DMA控制器 IP核 |
| 修稿时间： | |
PCI Express Interface Based on IP-core |
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| XU Tian,HE Dao-jun,XU Jin-fu.PCI Express Interface Based on IP-core[J].Computer Engineering,2009,35(24):239-241. |
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| Authors: | XU Tian HE Dao-jun XU Jin-fu |
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| Affiliation: | (1. Institute of Electronic Technology, PLA Information Engineering University, Zhengzhou 450004; 2. North Information Technology Institute, Beijing 100072) |
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| Abstract: | A design scheme for PCI Express interface based on IP-core is proposed, which uses storied structure and has such characteristics as high performance, high reliability and software compatibility. The PCI Express bus interface is designed and implemented by using PCI Express endpoint block hard IP-core in Xilinx xc5vlx30t Field Programmable Gate Array(FPGA). A DMA controller is also designed inside the interface logic circuit. Simulation experimental results show this interface speeds up the frequency of data transfer and the high performance of PCI Express bus is demonstrated adequately. |
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| Keywords: | PCI Express bus Field Programmable Gate Array(FPGA) DMA controller IP-core |
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