| 基于FPGA的万兆以太网接口的设计与实现 |
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| 引用本文： | 李伟,窦衡,周宇.基于FPGA的万兆以太网接口的设计与实现[J].光通信技术,2009,33(11). |
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| 作者姓名： | 李伟 窦衡 周宇 |
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| 作者单位： | 电子科技大学,成都,611731 |
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| 摘 要： | 介绍了IEEE802.3ae标准中万兆以太网物理层及媒质接入控制子层的相关协议.以10GBASE-R应用物理环境为例,阐述了万兆以太网接口各个单元模块的功能和设计实现方法.FPGA仿真结果表明,该万兆以太网接口可以实现以太网之间的万兆接入,对以太网的应用空间和性能提升有着重大的意义.
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| 关 键 词： | 万兆以太网 物理编码子层 |
Design and implementation for 10 Gigabit Ethernet(10GE) interface based on FPGA |
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| LI Wei,DOU Heng,ZHOU Yu.Design and implementation for 10 Gigabit Ethernet(10GE) interface based on FPGA[J].Optical Communication Technology,2009,33(11). |
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| Authors: | LI Wei DOU Heng ZHOU Yu |
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| Affiliation: | LI Wei,DOU Heng,ZHOU Yu(University of Electronic Science and Technology of China,Chengdou,611731,China) |
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| Abstract: | This paper introduces the protocols of 10GE standard assocaited in Physical Coding Sublayer and Media Access Control sublayer.As used in 10GBASE-R,It specifys the function and implementation of each module in the 10GE interface in detail.FPGA report shows that the design for this 10GE interface can reach the performances of connecting the Ethernet at a high speed of 10Gb/s,which has a great effect on the improving the Ethernet application scope and its performance. |
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| Keywords: | XGMII XSBI FPGA 10GE PCS XGMII XSBI FPGA |
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