| DDS+PLL宽带频率合成器的设计与实现 |
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| 引用本文： | 宋庆华,徐正芳.DDS+PLL宽带频率合成器的设计与实现[J].半导体技术,2008,33(8). |
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| 作者姓名： | 宋庆华 徐正芳 |
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| 作者单位： | 中国电子科技集团公司,第十三研究所,石家庄,050051 |
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| 摘 要： | 采用DDS PLL技术实现频率合成器,其特点是宽频带(3～6 CHz)、小步进(1 kHz)、低相位噪声,频率捷变.对其进行了理论分析,描述了宽频带和小步进的实现方式,相位噪声以及频率捷变的确定问题.频率合成器由DDS、锁相环路、压控振荡器、放大电路、参考信号和数据处理等电路组成.压控振荡器的信号经过功分、分频、下混频,滤波后和晶振信号在锁相环路进行鉴相,生成误差电压来控制VCO的频率,同时通过改变DDS的频率得到小步进、低相位噪声的输出信号.
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| 关 键 词： | 直接频率合成器 相位噪声 小步进 |
Wide-Band Frequency Synthesizer Based on DDS+PLL Designed and Achieved |
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| Song Qinghua,Xu Zhengfang.Wide-Band Frequency Synthesizer Based on DDS+PLL Designed and Achieved[J].Semiconductor Technology,2008,33(8). |
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| Authors: | Song Qinghua Xu Zhengfang |
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| Affiliation: | Song Qinghua,Xu Zhengfang(The 13th Electronic Research Institute,CETC,Shijiazhuang 050051,China) |
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| Abstract: | Wide-band frequency synthesizer based on DDS+PLL technique was introduced.The analysis was carried through in theory aspect.The method of achieved band-wide and small frequency step were described.Frequency synthesizer was composed of DDS,phase locked loop,voltage controlled oscillator,power amplifier,crystal oscillator and data circuit.The signal of VCO passed through power divider,freguency divider,down-mixer,filter was compared with that of crystal oscillator in phase locked loop.An error voltage is prod... |
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| Keywords: | DDS phase noise small frequency step |
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