10 K NbN ADC for IR sensor applications |
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Affiliation: | 1. Department of Psychology, The Ohio State University, Columbus, OH 43210, USA;2. Department of Psychology, Rutgers University, Newark, NJ 07102, USA;3. Department of Psychological Sciences, Case Western Reserve University, Cleveland, OH 44106, USA;4. Department of Psychology, The Florida Center for Reading Research, Florida State University, Tallahassee, FL 32310, USA;5. Department of Psychology and Neuroscience, University of Colorado, Boulder, CO 80309, USA;6. Department of Psychology, University of Denver, Denver, CO 80238, USA;1. Department of Urology, Clínica Alemana de Santiago, Vitacura, Santiago, Chile;2. Department of Urology, Hospital Regional de Antofagasta, Antofagasta, Chile;3. Department of Urology, Hospital Padre Hurtado, Santiago, Chile;4. Center for Genetics and Genomics, Faculty of Medicine, Clínica Alemana Universidad del Desarrollo, Lo Barnechea, Santiago, Chile;5. Center for Public Policies, Faculty of Medicine, Clínica Alemana Universidad del Desarrollo, Lo Barnechea, Santiago, Chile;6. Faculty of Medicine, Clínica Alemana Universidad del Desarrollo, Lo Barnechea, Santiago, Chile |
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Abstract: | The authors report the design, fabrication and test results of a 12-bit NbN SFQ counting A/D converter operating at 9 to 10 K and its insertion into a test IR focal plane array sensor system. The NbN IC is based on a linearized SQUID front-end which generates SFQ pulses at a frequency proportional to the signal. A gated SFQ counter integrates the signal over the sample time and the data is driven off chip through a serializing latching voltage state logic (MVTL) output shift register. The TRW A/D converter chip has been packaged and inserted into an IR focal plane array sensor test facility, or test bed, at the NASA Jet Propulsion Laboratory. The entire system has been successfully demonstrated producing IR images at 100 frames/s with the NbN A/D converter operating at 9 K, dissipating 0.3 mW. Performance of the A/D converter chip, the package including magnetic shielding and medium/high speed signal I/O, and the integrated test bed system are discussed. |
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