A 1.5-V full-swing BiCMOS logic circuit |
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Authors: | Hiraki M. Uano K. Minami M. Sato K. Matsuzaki N. Watanabe A. Nishida T. Sasaki K. Seki K. |
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Affiliation: | Hitachi Ltd., Tokyo; |
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Abstract: | A BiCMOS logic circuit applicable to sub-2-V digital circuits has been developed. A transiently saturated full-swing BiCMOS (TS-FS-BiCMOS) logic circuit operates twice as fast as CMOS at 1.5-V supply. A newly developed transient-saturation technique, with which bipolar transistors saturate only during switching periods, is the key to sub-2-V operation because a high-speed full-swing operation is achieved to remove the voltage loss due to the base-emitter turn-on voltage. Both small load dependence and small fan-in dependence of gate delay time are attained with this technique. A two-input gate fabricated with 0.3-μm BiCMOS technology verifies the performance advantage of TS-FS-BiCMOS over other BiCMOS circuits and CMOS at sub 2-V supply |
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