基于RNS的低复杂度DDS的设计与实现

传统直接数字频率合成器(DDS)较好的输出波形性能需要较大的硬件规模来实现。针对此问题,提出了一种基于余数系统(RNS)的DDS设计方法及硬件实现结构。该方法将截短后的相位进行余数化,实现样点存储空间压缩,并提高运行速度。基于ASIC的实现结果表明,该DDS在相同输出波形性能,特别是高性能输出波形情况下,能大幅度压缩存储空间；在归一化频率分辨率为1/2³²、查找表量化位宽为16位、输出波形无杂散动态范围(SFDR)为108 dB时,2通道余数化DDS的面积仅为相同条件下传统DDS的6%,其时延也优于传统DDS。

Design and Implementation Scheme for Direct Digital Frequency Synthesizer with Low-Complexity Based on RNS

Large-scale hardware is required for a good performance of a traditional direct digital frequency synthesizer (DDS). A design method and its hardware implementation of a DDS were proposed on the base of residue number system (RNS). This method was realized by transforming the phase value into RNS after phase truncation to achieve storage compression and speed promotion. ASIC-based implementation results showed that the storage of the RNS-based DDS was compressed in comparison with the traditional DDS at the same performance, and especially, compressed significantly at the high performance. In the same condition that the normalized frequency resolution was 1/2³², the look-up table quantization bit wide was 16 bit and the output spurious free dynamic range(SFDR) was 108 dB, the area of the DDS based on two-channel RNS was only 6 % of that of the traditional DDS, and the delay was also less than that of the traditional DDS.