Capacitance-Voltage characteristics of metal-insulator-semiconductor diodes with S passivation and Si interface control layers on GaAs and InP

GaAs and InP surfaces have been prepared by gas-phase and liquid-phase polysulfide passivation techniques followed by the deposition of Si interface control layers (ICLs) by e-beam evaporation. For GaAs surfaces, the performance of an ICL consisting of 1.5 nm Si on top of 0.5 nm of Ge has also been evaluated. Metal-insulator-semiconductor diodes with aluminum top electrodes were fabricated on these surfaces using silicon nitride deposited by a remote plasma-enhanced chemical vapor technique or silicon dioxide deposited by a conventional direct plasma-enhanced chemical vapor deposition technique. The quality of the interfaces was analyzed by capacitance-voltage (C-V) measurements and the interface state densities D_it were deduced from the C-V data using the high-low method. Values as low as 1.5 × 10¹² eV⁻¹cm⁻² were obtained for polysulfide-passivated GaAs surfaces with a Ge-Si or Si ICL, the lowest ever demonstrated using the high-low method for an ex-situ technique not involving GaAs epitaxy. For InP, the Si ICL does not reduce D_it below that of 2 × 10¹² eV⁻¹ cm ⁻² that was obtained for the polysulfide passivated surface. The Si ICL produces an interface that degrades more slowly on exposure to air for both GaAs and InP.