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微波着陆信号模拟器设计与实现
引用本文:唐曦,李文海.微波着陆信号模拟器设计与实现[J].国外电子测量技术,2017,36(12):77-82.
作者姓名:唐曦  李文海
作者单位:海军航空大学研究生四队 烟台 264001,海军航空大学科研部 烟台 264001
摘    要:为对某型机微波着陆设备进行测试与维修,提出了一种微波着陆信号模拟器的设计方法。首先简要介绍了微波着陆系统的基本原理和信号格式,并讨论了DPSK调制的具体实现方法。然后采用FPGA根据上位机参数设置合成微波着陆基带数字信号,经D/A转换后输出到IQ调制模块与载波混频,上变频为射频信号。最后对射频信号进行滤波和增益控制后输出。为方便对信号模拟的控制,在Lab Windows/CVI平台上开发了上位机软件,可灵活地对模拟信号类型、频率通道、模拟方位角和输出功率等进行设置。采用示波器和频谱仪对输出信号进行了测试,测试结果表明其各项参数都能达到设计要求。同时该设计方法减少了模拟环节、精简了硬件结构,且控制更加灵活。

关 键 词:微波着陆系统    DPSK    FPGA    Lab  Windows/CVI

Design and implementation of microwave landing signal simulator
Tang Xi and Li Wenhai.Design and implementation of microwave landing signal simulator[J].Foreign Electronic Measurement Technology,2017,36(12):77-82.
Authors:Tang Xi and Li Wenhai
Affiliation:Graduate Student Team Four, Naval University of Aeronautics, Yantai 264001, China and Department of Scientific Research, Naval University of Aeronautics, Yantai 264001, China
Abstract:In order to test and repair a kind of Microwave Landing Equipment, a design method of Microwave Landing signal simulator is proposed. Firstly, the basic principle and signal format of microwave landing system are briefly introduced, and the concrete realization method of DPSK modulation is discussed. And then use FPGA to synthesize the Microwave Landing baseband digital signal which is set according to the parameter of the host computer. After conversion by DAC, it is input to the IQ modulation module to up converting to RF signal. Finally, the RF signal is output after filtered and the gain. In order to facilitate the control of analog signals, the PC software developed on the Lab Windows/CVI platform has the flexibility to set the analog signal type, frequency channel, analog azimuth and output power. The output signal is tested with oscilloscope and spectrum analyzer. The test results show that the parameters can meet the design requirements. And the design method reduces the analog link, streamlining the hardware structure, and control more flexible.
Keywords:microwave landing system  DPSK  FPGA  Lab Windows/CVI
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