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Design of two Low-Power full adder cells using GDI structure and hybrid CMOS logic style |
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| Authors: | Vahid Foroutan MohammadReza Taheri Keivan Navi Arash Azizi Mazreah |
| Affiliation: | 1. Department of Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran;2. Faculty of Electrical and Computer Engineering, Shahid Beheshti University, GC, Tehran, Iran;3. Islamic Azad University, Sirjan Branch, Iran |
| Abstract: | Full adder is one of the most important digital components for which many improvements have been made to improve its architecture. In this paper, we present two new symmetric designs for Low-Power full adder cells featuring GDI (Gate-Diffusion Input) structure and hybrid CMOS logic style. The main design objectives for these adder modules are not only providing Low-Power dissipation and high speed but also full-voltage swing. |
| Keywords: | Ultra Low-Power GDI Hybrid CMOS logic style Full adder |
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