Solving the gate packing problem using a concurrent network |
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Authors: | Lin F. Lee K.-C. |
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Affiliation: | Santa Clara Univ., CA, USA; |
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Abstract: | The layout problem of gate matrices and one-dimensional logic arrays is composed of two major tasks: to find a permutation of gates which minimises the number of tracks required and to layout/pack gates based on the ordering. A parallel algorithm is presented which can pack n gates within O(1) time, whereas the conventional near-optimum algorithm needs O(n/sup 2/) time. The simulation results show that the increase of the problem size does not degrade the solution quality.<> |
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