| 四值时钟竞争型边沿触发器的研究 |
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| 引用本文： | 张炳德,徐方.四值时钟竞争型边沿触发器的研究[J].武汉大学学报(工学版),1998(4). |
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| 作者姓名： | 张炳德 徐方 |
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| 摘 要： | 利用时钟信号的竞争提出四值边沿触发器的设计方法，经计算机模拟比较二值触发器和四值触发器表明，四值边沿触发器具有正确的逻辑功能，其平均传输延迟时间与二值边沿触发器一致．
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| 关 键 词： | 多值逻辑 触发器 逻辑设计 |
On Quaternary Clock raced Edge triggered Flip flops |
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| Zhang Bingde\ Xu Fang.On Quaternary Clock raced Edge triggered Flip flops[J].Engineering Journal of Wuhan University,1998(4). |
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| Authors: | Zhang Bingde\ Xu Fang |
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| Affiliation: | College of Electric Engineering |
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| Abstract: | By means of clock raced pulse,an approach to design quaternary edge triggered flip flops is presented.The binary flip flops and the quatemary flip flops are simulated and compared by using computer.The result shows that the quatemary edge triggered flip flops have correct functions and have the same average propagation delay time as the binary edeg triggered flip flops. |
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| Keywords: | multiple valued logic flip flop logic design |
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