An implementation for a fast public-key cryptosystem |
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Authors: | G. B. Agnew R. C. Mullin I. M. Onyszchuk S. A. Vanstone |
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Affiliation: | (1) University of Waterloo, Waterloo, Ontario, Canada |
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Abstract: | In this paper we examine the development of a high-speed implementation of a system to perform exponentiation in fields of the form GF(2n). For sufficiently large n, this device has applications in public-key cryptography. The selection of representation and observations on the structure of multiplication have led to the development of an architecture which is of low complexity and high speed. A VLSI implementation has being fabricated with measured throughput for exponentiation for cryptographic purposes of approximately 300 kilobits per second. |
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Keywords: | Galois field Normal basis Multiplication Exponentiation Circuit architecture |
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