针对SoC的软硬件联合仿真方法

片上系统(System on Chip,SoC)是芯片设计的发展趋势,仿真与验证是芯片设计中最复杂、最耗时的环节之一。基于传统的数字电路验证方式对SoC设计验证效率低下的问题,提出了一种低耦合度的软/硬件联合仿真方法。软件调试过程的打印信息语句被微处理器仿真模型执行时,将向通用输入输出(General Purpose Input/Output,GPIO)输出相应的字符串,监视器模块检测GPIO的输出,并还原字符串信息,构建了软/硬件联合仿真。SoC设计实践证明,该方法大大减少了仿真的工作量,是一种非常实用有效的SoC仿真方法。

Method of Software and Hardware Co-simulation for SoC

SoC is the trend in the development of Integrated Circuit.The simulation and verification is an important process for SoC design.Aiming at the low efficiency of traditional verification method based on SoC design,the software and hardware co-simulation method is proposed.When the printing command during software debugging is executed by the simulation model of microprocessor,the microprocessor sends the corresponding character strings to General Purpose Input/Output(GPIO),and the monitor module detects the ouput of GPIO and recovers the character strings.So the software and hardware co-simulation is constituted.The experiment results show that the method can reduce the workload of simulation and is a practical and effective SoC simulation method.