A radix-8 wafer scale FFT processor |
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| Authors: | Earl E Swartzlander Jr Vijay K Jain and Hiroomi Hikawa |
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| Affiliation: | (1) Department of Electrical and Computer Engineering, University of Texas, 78712 Austin, TX;(2) Department of Electrical Engineering, University of South Florida, 33620 Tampa, FL |
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| Abstract: | Wafer Scale Integration promises radical improvements in the performance of digital signal processing systems. This paper describes the design of a radix-8 systolic (pipeline) fast Fourier transform processor for implementation with wafer scale integration. By the use of the radix-8 FFT butterfly wafer that is currently under development, continuous data rates of 160 MSPS are anticipated for FFTs of up to 4096 points with 16-bit fixed point data. |
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