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An Effective Software Pipelining Algorithm for Clustered Embedded VLIW Processors
Authors:Cagdas Akturan  Margarida F. Jacome
Affiliation:(1) Department of Electrical and Computer Engineering, The University of Texas at Austin, ACES Building 5.118, Austin, TX 78712-1084, USA
Abstract:This paper proposes a software pipelining framework, CALiBeR (ClusterAware Load Balancing Retiming Algorithm), suitable for compilers targetingclustered embedded VLIW processors. CALiBeR can be used by embedded systemdesigners to explore different code optimization alternatives, that is, high-qualitycustomized retiming solutions for desired throughput and program memory sizerequirements, while minimizing register pressure. An extensive set of experimentalresults is presented, demonstrating that our algorithm compares favorablywith one of the best state-of-the-art algorithms, achieving up to 50% improvementin performance and up to 47% improvement in register requirements. In orderto empirically assess the effectiveness of clustering for high ILP applications,additional experiments are presented contrasting the performance achievedby software pipelined kernels executing on clustered and on centralized machines.
Keywords:Clustering  embedded systems  optimizingcompilers  retiming  soft real-time applications  software pipelining  VLIW processor
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