| CMOS VLSI芯片中的电源总线噪声 |
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| 引用本文： | 严立雄.CMOS VLSI芯片中的电源总线噪声[J].微处理机,1999(1):8-10. |
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| 作者姓名： | 严立雄 |
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| 作者单位： | 东北微电子研究所!沈阳110032 |
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| 摘 要： | 本文介绍了ＣＭＯＳ ＶＬＳＩ芯片中电源总线噪声产生机理和对电路正常操作的影响。通过ＶＬＳＩ芯片版图设计技巧和对输出驱动器进行噪声限制，达到对电源总线噪声的有效控制。
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| 关 键 词： | CMOS VLSI芯片 电源总线噪声 微处理器 |
Power Bus Noise in a CMOS VLSI Chip |
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| Yan Lixiong Northeast Microelectronics Institute,Shenyang.Power Bus Noise in a CMOS VLSI Chip[J].Microprocessors,1999(1):8-10. |
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| Authors: | Yan Lixiong Northeast Microelectronics Institute Shenyang |
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| Affiliation: | Yan Lixiong Northeast Microelectronics Institute,Shenyang 110032 |
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| Abstract: | This paper introduces the mechanism of power bus noise generation in a CMOS VLSI chip and the effect on normal circuit operation.The power bus noise can be effectively controlled by a layout technique and using output driver with noise limit resistanle. |
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| Keywords: | switchiny noise simultaneous switching noise current spike output driver power bus noise |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
